The present invention relates generally to a semiconductor device and a method for manufacturing the same, and more particularly to a semiconductor device and a method for manufacturing the same for preventing the leaning of storage nodes.
With increasing demand for semiconductor memory devices, various techniques for obtaining a capacitor having high capacitance have been proposed in the art. The capacitor has a structure in which a dielectric is interposed between storage nodes and plate nodes. As understood by ones skilled in the art, the capacitance of the capacitor is proportional to the surface area of an electrode and the dielectric constant of the dielectric and is inversely proportional to the distance between electrodes, that is, the thickness of the dielectric.
Therefore, in order to obtain a capacitor having high capacitance, it is necessary to use a dielectric having high dielectric constant, increase the surface area of an electrode, or decrease the distance between electrodes. In this regard, limitations exist in decreasing the distance between electrodes, that is, the thickness of the dielectric. Therefore, research for forming a capacitor having high capacitance is mainly directed toward using a dielectric having high dielectric constant or increasing the surface area of an electrode.
As a method for increasing the surface area of an electrode, a capacitor can be formed in a concave type or a cylinder type. In comparison between these two types, the cylinder type capacitor has the wide surface area of an electrode when compared to the concave type capacitor because the cylinder type has a CIAIC (cathode-insulator-anode-insulator-cathode) structure in which both surfaces of a storage node can be utilized. Therefore, the cylinder type capacitor has advantages when applied to a highly integrated semiconductor device.
Hereafter, a conventional method for manufacturing a semiconductor device having cylinder-shaped capacitors will be briefly described.
After forming an interlayer dielectric on a semiconductor substrate, storage node contact plugs are formed in the interlayer dielectric. After forming a mold insulation layer for serving as a mold for forming storage nodes on the interlayer dielectric including the storage node contact plugs, by etching the mold insulation layer, holes are defined to expose the storage node contact plugs.
After forming a conductive layer for storage nodes on the mold insulation layer including the surfaces of the holes, storage nodes are formed by removing portions of the conductive layer for storage nodes which are formed on the mold insulation layer. Then, the mold insulation layer that served as the mold for forming the storage nodes is removed. Thereafter, the cylinder-shape capacitors are formed by sequentially forming a dielectric and plate nodes on the storage nodes.
However, in the conventional art, as the size of cells decreases in order to accommodate the trend toward the high integration of semiconductor devices, not only does the aspect ratio of the storage nodes increases, but also the space between storage nodes becomes narrow. As a result, the leaning phenomenon of the storage nodes occurs.
Therefore, the conventional art disclosed a method of forming support patterns for fixing the storage nodes in the form of a quadrangle or a straight line when viewed from the top.
However, when fixing the storage nodes in the form of a quadrangle, the support patterns are weak that causes the storage nodes to lean. Also, when the storage nodes are in the form of a quadrangle, the support patterns are likely to separate from the storage nodes. This separation causes defects in subsequent processes.
Further, when fixing the storage nodes in the form of a straight line, cracks are likely to occur between the support patterns and the storage nodes. These cracks are caused by the stress produced from depositing a dielectric and a conductive layer for plate nodes. As a result, the breakdown voltage of the capacitors decrease, and capacitance often leak.